comparison e1000_initialize_reception.patch @ 80:0354cceee710

WIP on e1000, try to add the code to free the RX ring when shutting the interface down
author Louis Opter <louis@lse.epitech.net>
date Sun, 15 Apr 2012 02:53:38 +0200
parents f07f6c6d6cd4
children
comparison
equal deleted inserted replaced
79:f07f6c6d6cd4 80:0354cceee710
1 # HG changeset patch 1 # HG changeset patch
2 # Parent 0d14f4eef173e65c3430393966e5f7e3bef7a8b2 2 # Parent d8fce7ee2b630bf8bd681fa4d66832b82c5e6de2
3 rathaxes: initialize reception on the e1000 sample: 3 rathaxes: initialize reception on the e1000 sample:
4 4
5 - This is documented in details in the sections 14.4 and 3.2 of the 5 - This is documented in details in the sections 14.4 and 3.2 of the
6 Intel Gigabit Controller Software Developer manual; 6 Intel Gigabit Controller Software Developer manual;
7 - "Address filtering" is set up, address filters just tell the hardware 7 - "Address filtering" is set up, address filters just tell the hardware
171 + 171 +
172 + /* 172 + /*
173 * "General Configuration" (section 14.3): 173 * "General Configuration" (section 14.3):
174 * 174 *
175 * - CTRL.ASDE/CTRL.SLU: Let the PHY handle the speed detection & 175 * - CTRL.ASDE/CTRL.SLU: Let the PHY handle the speed detection &
176 @@ -478,22 +574,152 @@ 176 @@ -478,22 +574,181 @@
177 * - Finally, initialize all the statistic registers from 177 * - Finally, initialize all the statistic registers from
178 * E1000_CRCERRS to E1000_TSCTFC. 178 * E1000_CRCERRS to E1000_TSCTFC.
179 */ 179 */
180 - rtx_e1000_register_set32(&${ctx}->hw_ctx, E1000_CTRL, 180 - rtx_e1000_register_set32(&${ctx}->hw_ctx, E1000_CTRL,
181 + 181 +
191 E1000_CMD_VME); 191 E1000_CMD_VME);
192 - rtx_e1000_register_write32(&${ctx}->hw_ctx, E1000_FCAH, 0); 192 - rtx_e1000_register_write32(&${ctx}->hw_ctx, E1000_FCAH, 0);
193 - rtx_e1000_register_write32(&${ctx}->hw_ctx, E1000_FCAL, 0); 193 - rtx_e1000_register_write32(&${ctx}->hw_ctx, E1000_FCAL, 0);
194 - rtx_e1000_register_write32(&${ctx}->hw_ctx, E1000_FCT, 0); 194 - rtx_e1000_register_write32(&${ctx}->hw_ctx, E1000_FCT, 0);
195 - rtx_e1000_register_write32(&${ctx}->hw_ctx, E1000_FCTTV, 0); 195 - rtx_e1000_register_write32(&${ctx}->hw_ctx, E1000_FCTTV, 0);
196 - int i = 0;
197 + rtx_e1000_register_write32(hw_ctx, E1000_FCAH, 0); 196 + rtx_e1000_register_write32(hw_ctx, E1000_FCAH, 0);
198 + rtx_e1000_register_write32(hw_ctx, E1000_FCAL, 0); 197 + rtx_e1000_register_write32(hw_ctx, E1000_FCAL, 0);
199 + rtx_e1000_register_write32(hw_ctx, E1000_FCT, 0); 198 + rtx_e1000_register_write32(hw_ctx, E1000_FCT, 0);
200 + rtx_e1000_register_write32(hw_ctx, E1000_FCTTV, 0); 199 + rtx_e1000_register_write32(hw_ctx, E1000_FCTTV, 0);
201 + int i = 0; /* CNorm workaround, the init part of for isn't generated */ 200 + int i = 0; /* CNorm workaround, the init part of for isn't generated */
202 for (i = 0; i != 64; ++i) 201 + for (i = 0; i != 64; ++i)
203 - rtx_e1000_register_write32(&${ctx}->hw_ctx, E1000_CRCERRS + i * 4, 0);
204 + rtx_e1000_register_write32(hw_ctx, E1000_CRCERRS + i * 4, 0); 202 + rtx_e1000_register_write32(hw_ctx, E1000_CRCERRS + i * 4, 0);
205 + 203 +
206 + //${Log::info("setup_device: general configuration done")}; 204 + {
205 + ${Log::info("setup_device: general configuration done")};
206 + }
207 + 207 +
208 + /* 208 + /*
209 + * Receive initialization: 209 + * Receive initialization:
210 + * 210 + *
211 + * 1. Program the receive address, in RAL/RAH; 211 + * 1. Program the receive address, in RAL/RAH;
229 + */ 229 + */
230 + rtx_e1000_register_write32(hw_ctx, E1000_RAH, 230 + rtx_e1000_register_write32(hw_ctx, E1000_RAH,
231 + *(unsigned short *)(&${ctx}->net_dev->dev_addr[4])); 231 + *(unsigned short *)(&${ctx}->net_dev->dev_addr[4]));
232 + rtx_e1000_register_set32(hw_ctx, E1000_RAH, E1000_RAH_AV); 232 + rtx_e1000_register_set32(hw_ctx, E1000_RAH, E1000_RAH_AV);
233 + 233 +
234 + //${Log::info("setup_device: program receieve address done")}; 234 + {
235 + ${Log::info("setup_device: program receieve address done")};
236 + }
235 + 237 +
236 + /* 2. Initialize the MTA */ 238 + /* 2. Initialize the MTA */
237 + 239 +
238 + i = 0; /* CNorm workaround, the init part of for isn't generated */ 240 + i = 0; /* CNorm workaround, the init part of for isn't generated */
239 + for (i = 0; i != 128; ++i) 241 + for (i = 0; i != 128; ++i)
240 + rtx_e1000_register_write32(hw_ctx, E1000_MTA + i * 4, 0); 242 + rtx_e1000_register_write32(hw_ctx, E1000_MTA + i * 4, 0);
241 + 243 +
242 + //${Log::info("setup_device: MTA init done")}; 244 + {
245 + ${Log::info("setup_device: MTA init done")};
246 + }
243 + 247 +
244 + /* 4. Setup the receive descriptor ring */ 248 + /* 4. Setup the receive descriptor ring */
245 + 249 +
246 + /* Allocate the descriptors */ 250 + /* Allocate the descriptors */
247 + hw_ctx->rx_ring.size = ${config.rx_ring_size} * sizeof(*hw_ctx->rx_ring.base); 251 + hw_ctx->rx_ring.size = ${config.rx_ring_size} * sizeof(*hw_ctx->rx_ring.base);
255 + { 259 + {
256 + ${Log::info("cannot allocate the descriptors for the rx ring")}; 260 + ${Log::info("cannot allocate the descriptors for the rx ring")};
257 + goto err_rx_ring_alloc; 261 + goto err_rx_ring_alloc;
258 + } 262 + }
259 + 263 +
260 + //${Log::info("setup_device: descriptors allocated")}; 264 + {
265 + ${Log::info("setup_device: descriptors allocated")};
266 + }
261 + 267 +
262 + /* 268 + /*
263 + * Allocate the skbuffs, map them for DMA, and write their address 269 + * Allocate the skbuffs, map them for DMA, and write their address
264 + * in the corresponding descriptor. 270 + * in the corresponding descriptor.
265 + */ 271 + */
291 + } 297 + }
292 + hw_ctx->rx_ring.base[i].buff_addr = (unsigned long int)cpu_to_le64( 298 + hw_ctx->rx_ring.base[i].buff_addr = (unsigned long int)cpu_to_le64(
293 + hw_ctx->rx_ring.dma_skbuffs[i]); 299 + hw_ctx->rx_ring.dma_skbuffs[i]);
294 + } 300 + }
295 + 301 +
296 + //${Log::info("setup_device: skbuffs allocated")}; 302 + {
303 + ${Log::info("setup_device: skbuffs allocated")};
304 + }
297 + 305 +
298 + /* 306 + /*
299 + * XXX: We can't return here since we are not in a function but in 307 + * XXX: We can't return here since we are not in a function but in
300 + * a chunk of code (injected in a function). 308 + * a chunk of code (injected in a function).
301 + */ 309 + */
328 + 336 +
329 + template sequence e1000::free_rx_tx(Ethernet::Device ctx) 337 + template sequence e1000::free_rx_tx(Ethernet::Device ctx)
330 + { 338 + {
331 + chunk ::CALL() 339 + chunk ::CALL()
332 + { 340 + {
341 + typedef unsigned long int dma_addr_t;
342 +
343 + typedef int ${e1000::Context};
344 + ${e1000::Context} hw_ctx;
345 + hw_ctx = &${ctx}->hw_ctx;
346 +
347 + /* Free the rx ring: */
348 int i = 0;
349 - for (i = 0; i != 64; ++i)
350 - rtx_e1000_register_write32(&${ctx}->hw_ctx, E1000_CRCERRS + i * 4, 0);
351 + for (i = 0; i != ${config.rx_ring_size}; ++i)
352 + {
353 + dma_unmap_single(
354 + &${ctx}->pci_dev->dev,
355 + (dma_addr_t)hw_ctx->rx_ring.dma_skbuffs[i],
356 + ${config.rx_buffer_len},
357 + DMA_FROM_DEVICE);
358 + dev_kfree_skb(hw_ctx->rx_ring.skbuffs[i]);
359 + }
360 + dma_free_coherent(&${ctx}->pci_dev->dev, hw_ctx->rx_ring.size,
361 + hw_ctx->rx_ring.base, (dma_addr_t)hw_ctx->rx_ring.dma_base);
333 + 362 +
334 } 363 }
335 } 364 }
336 365
337 diff --git a/rathaxes/samples/e1000/e1000.rti b/rathaxes/samples/e1000/e1000.rti 366 diff --git a/rathaxes/samples/e1000/e1000.rti b/rathaxes/samples/e1000/e1000.rti