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annotate Lib/mk20dx128vlf5.bootloader.ld @ 412:e7a3be42ae1e

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Debug code for interconnect cable debugging
author Jacob Alexander <haata@kiibohd.com>
date Sat, 20 Feb 2016 13:27:49 -0800
parents f4d4cad283c6
children
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1 /* Teensyduino Core Library
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2 * http://www.pjrc.com/teensy/
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3 * Copyright (c) 2013 PJRC.COM, LLC.
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4 * Modifications by Jacob Alexander 2014 for use with McHCK
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5 *
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6 * Permission is hereby granted, free of charge, to any person obtaining
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7 * a copy of this software and associated documentation files (the
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8 * "Software"), to deal in the Software without restriction, including
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9 * without limitation the rights to use, copy, modify, merge, publish,
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10 * distribute, sublicense, and/or sell copies of the Software, and to
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11 * permit persons to whom the Software is furnished to do so, subject to
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12 * the following conditions:
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13 *
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14 * 1. The above copyright notice and this permission notice shall be
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15 * included in all copies or substantial portions of the Software.
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16 *
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17 * 2. If the Software is incorporated into a build system that allows
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18 * selection among a list of target devices, then similar target
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19 * devices manufactured by PJRC.COM must be included in the list of
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20 * target devices and selectable in the same manner.
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21 *
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22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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23 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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26 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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27 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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28 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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29 * SOFTWARE.
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30 */
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31
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32 MEMORY
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33 {
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34 FLASH (rx) : ORIGIN = 0x0, LENGTH = 128K
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35 FLASH_APP (rx) : ORIGIN = 4K, LENGTH = 128K-4K
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36 RAM (rwx) : ORIGIN = 0x20000000 - 16K / 2, LENGTH = 16K
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37 }
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38
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39 /* Starting Address of the application ROM */
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40 _app_rom = ORIGIN( FLASH_APP );
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41
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42 FlexRAM = 0x14000000;
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43 FTFL = 0x40020000;
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44 SCB = 0xe000ed00;
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45 USB0 = 0x40072000;
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46 SIM = 0x40047000;
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47
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48 /* Section Definitions */
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49 SECTIONS
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50 {
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51 .text :
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52 {
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53 . = 0; KEEP(* (.vectors)) /* MUST BE AT 0 */
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54 *(.startup*)
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55 *(.rodata*)
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56 . = 0x400; KEEP(* (.flashconfig)) /* MUST BE AT 0x400 */
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57 *(.text*)
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58 . = ALIGN(4);
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59 KEEP(*(.init))
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60 } > FLASH
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61
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62 .ARM.exidx :
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63 {
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64 __exidx_start = .;
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65 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
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66 __exidx_end = .;
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67 } > FLASH
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68 _etext = .;
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69
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70 .usbdescriptortable (NOLOAD) : {
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71 . = ALIGN(512);
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72 *(.usbdescriptortable*)
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73 } > RAM
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74
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75 .dmabuffers (NOLOAD) : {
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76 . = ALIGN(4);
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77 *(.dmabuffers*)
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78 } > RAM
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79
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80 .usbbuffers (NOLOAD) : {
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81 . = ALIGN(4);
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82 *(.usbbuffers*)
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83 } > RAM
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84
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85 .data : AT (_etext) {
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86 . = ALIGN(4);
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87 _sdata = .;
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88 *(SORT_BY_ALIGNMENT(.ramtext.*) SORT_BY_ALIGNMENT(.data*))
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89 *(.data*)
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90 . = ALIGN(4);
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91 _edata = .;
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92 } > RAM
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93
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94 .noinit (NOLOAD) : {
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95 *(.noinit*)
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96 } > RAM
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97
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98 .bss : {
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99 . = ALIGN(4);
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100 _sbss = .;
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101 *(.bss*)
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102 *(COMMON)
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103 . = ALIGN(4);
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104 _ebss = .;
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105 __bss_end = .;
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106 } > RAM
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107
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108 _estack = ORIGIN(RAM) + LENGTH(RAM);
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109 }
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110