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comparison Lib/mk20dx.h @ 389:fc2c2a1e9615

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Adding basic remote capabilities + UART Rx DMA buffers - Rx buffers weren't fast enough, had to use DMA :D - Basic LCD remote capabilities are working, single node - Multi-node broadcast seems to have a bug still - DMA ring buffer allowed for significant processing simplification * There is an overrun risk, but the buffer is large and generally there isn't too much data being sent (just very quickly) - Split out LCD layer stack capability into itself and an "exact" version used for updating remote nodes
author Jacob Alexander <haata@kiibohd.com>
date Thu, 15 Oct 2015 00:16:36 -0700
parents 06a54d582bf8
children
comparison
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388:3ddab7faf67d 389:fc2c2a1e9615
509 #define DMA_ERQ *(volatile uint32_t *)0x4000800C // Enable Request Register 509 #define DMA_ERQ *(volatile uint32_t *)0x4000800C // Enable Request Register
510 #define DMA_ERQ_ERQ0 ((uint32_t)1<<0) // Enable DMA Request 0 510 #define DMA_ERQ_ERQ0 ((uint32_t)1<<0) // Enable DMA Request 0
511 #define DMA_ERQ_ERQ1 ((uint32_t)1<<1) // Enable DMA Request 1 511 #define DMA_ERQ_ERQ1 ((uint32_t)1<<1) // Enable DMA Request 1
512 #define DMA_ERQ_ERQ2 ((uint32_t)1<<2) // Enable DMA Request 2 512 #define DMA_ERQ_ERQ2 ((uint32_t)1<<2) // Enable DMA Request 2
513 #define DMA_ERQ_ERQ3 ((uint32_t)1<<3) // Enable DMA Request 3 513 #define DMA_ERQ_ERQ3 ((uint32_t)1<<3) // Enable DMA Request 3
514 #define DMA_ERQ_ERQ4 ((uint32_t)1<<4) // Enable DMA Request 4
515 #define DMA_ERQ_ERQ5 ((uint32_t)1<<5) // Enable DMA Request 5
516 #define DMA_ERQ_ERQ6 ((uint32_t)1<<6) // Enable DMA Request 6
517 #define DMA_ERQ_ERQ7 ((uint32_t)1<<7) // Enable DMA Request 7
518 #define DMA_ERQ_ERQ8 ((uint32_t)1<<8) // Enable DMA Request 8
519 #define DMA_ERQ_ERQ9 ((uint32_t)1<<9) // Enable DMA Request 9
520 #define DMA_ERQ_ERQ10 ((uint32_t)1<<10) // Enable DMA Request 10
521 #define DMA_ERQ_ERQ11 ((uint32_t)1<<11) // Enable DMA Request 11
522 #define DMA_ERQ_ERQ12 ((uint32_t)1<<12) // Enable DMA Request 12
523 #define DMA_ERQ_ERQ13 ((uint32_t)1<<13) // Enable DMA Request 13
524 #define DMA_ERQ_ERQ14 ((uint32_t)1<<14) // Enable DMA Request 14
525 #define DMA_ERQ_ERQ15 ((uint32_t)1<<15) // Enable DMA Request 15
526 #define DMA_ERQ_ERQ16 ((uint32_t)1<<16) // Enable DMA Request 16
514 #define DMA_EEI *(volatile uint32_t *)0x40008014 // Enable Error Interrupt Register 527 #define DMA_EEI *(volatile uint32_t *)0x40008014 // Enable Error Interrupt Register
515 #define DMA_EEI_EEI0 ((uint32_t)1<<0) // Enable Error Interrupt 0 528 #define DMA_EEI_EEI0 ((uint32_t)1<<0) // Enable Error Interrupt 0
516 #define DMA_EEI_EEI1 ((uint32_t)1<<1) // Enable Error Interrupt 1 529 #define DMA_EEI_EEI1 ((uint32_t)1<<1) // Enable Error Interrupt 1
517 #define DMA_EEI_EEI2 ((uint32_t)1<<2) // Enable Error Interrupt 2 530 #define DMA_EEI_EEI2 ((uint32_t)1<<2) // Enable Error Interrupt 2
518 #define DMA_EEI_EEI3 ((uint32_t)1<<3) // Enable Error Interrupt 3 531 #define DMA_EEI_EEI3 ((uint32_t)1<<3) // Enable Error Interrupt 3
532 #define DMA_EEI_EEI4 ((uint32_t)1<<4) // Enable Error Interrupt 4
533 #define DMA_EEI_EEI5 ((uint32_t)1<<5) // Enable Error Interrupt 5
534 #define DMA_EEI_EEI6 ((uint32_t)1<<6) // Enable Error Interrupt 6
535 #define DMA_EEI_EEI7 ((uint32_t)1<<7) // Enable Error Interrupt 7
536 #define DMA_EEI_EEI8 ((uint32_t)1<<8) // Enable Error Interrupt 8
537 #define DMA_EEI_EEI9 ((uint32_t)1<<9) // Enable Error Interrupt 9
538 #define DMA_EEI_EEI10 ((uint32_t)1<<10) // Enable Error Interrupt 10
539 #define DMA_EEI_EEI11 ((uint32_t)1<<11) // Enable Error Interrupt 11
540 #define DMA_EEI_EEI12 ((uint32_t)1<<12) // Enable Error Interrupt 12
541 #define DMA_EEI_EEI13 ((uint32_t)1<<13) // Enable Error Interrupt 13
542 #define DMA_EEI_EEI14 ((uint32_t)1<<14) // Enable Error Interrupt 14
543 #define DMA_EEI_EEI15 ((uint32_t)1<<15) // Enable Error Interrupt 15
544 #define DMA_EEI_EEI16 ((uint32_t)1<<16) // Enable Error Interrupt 16
519 #define DMA_CEEI *(volatile uint8_t *)0x40008018 // Clear Enable Error Interrupt Register 545 #define DMA_CEEI *(volatile uint8_t *)0x40008018 // Clear Enable Error Interrupt Register
520 #define DMA_CEEI_CEEI(n) ((uint8_t)(n & 3)<<0) // Clear Enable Error Interrupt 546 #define DMA_CEEI_CEEI(n) ((uint8_t)(n & 3)<<0) // Clear Enable Error Interrupt
521 #define DMA_CEEI_CAEE ((uint8_t)1<<6) // Clear All Enable Error Interrupts 547 #define DMA_CEEI_CAEE ((uint8_t)1<<6) // Clear All Enable Error Interrupts
522 #define DMA_CEEI_NOP ((uint8_t)1<<7) // NOP 548 #define DMA_CEEI_NOP ((uint8_t)1<<7) // NOP
523 #define DMA_SEEI *(volatile uint8_t *)0x40008019 // Set Enable Error Interrupt Register 549 #define DMA_SEEI *(volatile uint8_t *)0x40008019 // Set Enable Error Interrupt Register
1466 #define UART0_D *(volatile uint8_t *)0x4006A007 // UART Data Register 1492 #define UART0_D *(volatile uint8_t *)0x4006A007 // UART Data Register
1467 #define UART0_MA1 *(volatile uint8_t *)0x4006A008 // UART Match Address Registers 1 1493 #define UART0_MA1 *(volatile uint8_t *)0x4006A008 // UART Match Address Registers 1
1468 #define UART0_MA2 *(volatile uint8_t *)0x4006A009 // UART Match Address Registers 2 1494 #define UART0_MA2 *(volatile uint8_t *)0x4006A009 // UART Match Address Registers 2
1469 #define UART0_C4 *(volatile uint8_t *)0x4006A00A // UART Control Register 4 1495 #define UART0_C4 *(volatile uint8_t *)0x4006A00A // UART Control Register 4
1470 #define UART0_C5 *(volatile uint8_t *)0x4006A00B // UART Control Register 5 1496 #define UART0_C5 *(volatile uint8_t *)0x4006A00B // UART Control Register 5
1497 #define UART_C5_TDMAS 0x80
1498 #define UART_C5_RDMAS 0x20
1471 #define UART0_ED *(volatile uint8_t *)0x4006A00C // UART Extended Data Register 1499 #define UART0_ED *(volatile uint8_t *)0x4006A00C // UART Extended Data Register
1472 #define UART0_MODEM *(volatile uint8_t *)0x4006A00D // UART Modem Register 1500 #define UART0_MODEM *(volatile uint8_t *)0x4006A00D // UART Modem Register
1473 #define UART0_IR *(volatile uint8_t *)0x4006A00E // UART Infrared Register 1501 #define UART0_IR *(volatile uint8_t *)0x4006A00E // UART Infrared Register
1474 #define UART0_PFIFO *(volatile uint8_t *)0x4006A010 // UART FIFO Parameters 1502 #define UART0_PFIFO *(volatile uint8_t *)0x4006A010 // UART FIFO Parameters
1475 #define UART_PFIFO_TXFE (uint8_t)0x80 1503 #define UART_PFIFO_TXFE (uint8_t)0x80