349
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1 Pin Usage
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2 =========
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3
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4 mk20dx256vlh7
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5
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6 ----
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7 |Keys|
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8 ----
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9
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10 * Strobe (Columns)
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11
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12 TODO
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13
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14 * Sense (Rows)
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15
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16 TODO
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17
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18
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19 -----
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20 |Clock|
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21 -----
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22
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23 PTA18 <-> PTA19
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24
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25
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26 ---
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27 |I2C|
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28 ---
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29
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30 * Main - Connect to all ISSI Chips - Also break out header for debugging
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31
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32 PTB0 - SCL0 (add header pin, label as SCL0)
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33 PTB1 - SDA0 (add header pin, label as SDA0)
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34
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35 * Reserved for I2C usage
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36
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37 PTC10 - SCL1 (Reserved, can use as GPIO)
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38 PTC11 - SDA1 (Reserved, can use as GPIO)
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39
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40 * ISSI Control (enough pins for 3 chips reserved)
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41
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42 PTB17 - INTB Chip 1
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43 PTB18 - INTB Chip 2 (Reserved, can use as GPIO)
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44 PTB19 - INTB Chip 3 (Reserved, can use as GPIO)
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45
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46 PTB16 - SDB (tied to all Chips, hardware shutdown)
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47
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48
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49 ---
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50 |PWM|
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51 ---
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52
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53 NHD-C12832A1Z-FS(RGB)-FBW-3V
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54
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55 PTC1 - K(R)
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56 PTC2 - K(G)
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57 PTC3 - K(B)
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58
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59
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60 ---
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61 |SPI|
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62 ---
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63
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64 NHD-C12832A1Z-FS(RGB)-FBW-3V
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65
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66 PTC4 - CS1B - SS1
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67 PTC5 - SCL - SCLK
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68 PTC6 - SDA(SI) - MOSI
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69 PTC7 - A0 (Not SPI, used for display)
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70 PTC8 - RST (Not SPI, used for display)
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71
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72
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73 ---
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74 |DAC|
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75 ---
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76
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77 DAC0 (N/C)
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78
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79
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80 ----
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81 |UART|
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82 ----
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83
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84 * Comm - For bi-directional communication between halves
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85
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86 PTA1 - RX0 (Master Side)
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87 PTA2 - TX0 (Master Side)
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88
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89 PTE0 - TX1 (Slave Side)
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90 PTE1 - RX1 (Slave Side)
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91
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92 PTD2 - RX2 (UART Debug Header)
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93 PTD3 - TX2 (UART Debug Header)
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94
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95
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96 -----
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97 |Debug|
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98 -----
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99
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100 * SWD - (Main reflash header)
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101
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102 PTA0 (Pull-down)
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103 PTA3 (Pull-up)
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104
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105 * LEDs
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106
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107 PTA5 (LED only for PCB, not Teensy)
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108
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109 * UARTs
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110
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111 PTD2 - RX2 (UART Debug Header, label as RX2)
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112 PTD3 - TX2 (UART Debug Header, label as TX2)
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113
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114
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115 ------
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116 |Unused|
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117 ------
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118
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119 * GPIO
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120
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121 PTA4
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122 PTA12
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123 PTA13
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124 PTB2
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125 PTB3
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126 PTB16
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127 PTB17
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128 PTB18
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129 PTB19
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130 PTC0
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131 PTC9
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132 PTC10
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133 PTC11
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134 PTD0
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135 PTD1
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136 PTD4
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137 PTD5
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138 PTD6
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139 PTD7
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140
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141 * Analog
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142
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143 TODO
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144
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